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          The audio system chip selects multiple performance parameters for detailed explanation

          System design is a complicated process. Not only can an IC be used, but also many details need to be considered. This article takes a high-fidelity music playback system as an example to introduce how to select a chip to build a system that meets market demand.

          The modern integrated circuit industry has always strictly followed the "Moore's Law" of rapid development. The faster and faster the chip development, the lower the requirements for software systems. Now speed is everything, whether it's chip speed, software development speed, or speed to market. But is it enough to have a chip? Below we try to start with a relatively simple high-fidelity music playback device to see how we need to implement such a system using commercially available ICs.

          Audio system requirements for processor chips

          From the perspective of signal processing and chip design, the principle of the audio system is not complicated, so many semiconductor manufacturers seem to disregard audio products and chase some large-volume or high-tech products with high technology content such as high-definition video processing. . When designing this high-fidelity music replay system, the author communicated with the design departments of different domestic IC design companies. The replies obtained were all "simple and no problem" responses. After the system is made, it is often found that the effect is not satisfactory. It can be said that we have been suffering from hardware performance bottlenecks due to the problem of chip selection during the development of this system for several years.

          The following are our specific requirements for the processor chip: 1. The speed should be above 400MHz, it is best to decode the bit rate of APE C4000; 2. Need to support USB 2.0 Host / SATA / SD card; 3. Need to support the network; 4 . RAM with 128MB or more, the bigger the better; 5. NAND Flash with 256MB or more; 6. Support I2S multiple output and can support Slave clock, support the highest sampling rate of 768KHz, and the highest 32-bit output; 7. The best Have audio data post-processing ability; 8. Have excellent performance clock circuit and DAC.

          The core speed that the chip can run has a crucial impact on the decoding efficiency. For example, the lossless audio compression APE C5000 decoding method has high requirements on the processor. Taking the Intel ATOM 1.6G netbook as an example, its decoding is 192k / C5000 two channels Music cannot be played continuously, let alone ordinary embedded systems? Therefore, it can only handle lower bit rates. Lossless compression is not the same as MP3. It needs to restore a completely consistent data stream. The performance of the processor determines the efficiency of the decoding, so the core frequency is too low to do the job.

          USB 2.0 has very high requirements on hardware, PHY compatibility is a big problem, and the efficiency of data flow is second. Similarly, SD card interface compatibility is also a headache for domestic chips. SATA demand raises the peripheral speed of the processor to a higher position. After all, not everyone can do 1.5G / 3G PHY.

          The system operation depends on the programs stored in NAND Flash, but the development speed of NAND Flash is faster than that of the processor. When NAND Flash was defined in the past, ECC was designed outside, leaving the processor always behind NAND Flash for a period of time. Therefore, when NAND Flash is transformed, manufacturers will be unable to ship because they cannot buy chips on the market or need to grab high prices. On the other hand, with the improvement of RAM, its cost is getting lower and lower, which leads to the gradual reduction of production of high-cost SDRAM. Therefore, the processor using old memory is inherently insufficient, and the system BOM cost is higher than the system cost using new RAM. Therefore, the processor needs to support a variety of startup methods, not limited to NAND Flash. At the same time, RAM should conform to the current mainstream computer and use DDR2 / DDR3 and other memory, so that it can achieve low cost and high income.

          The last and most important issue is the export I2S of the audio system. No matter what data stream comes in, it needs to be output from I2S, and this data stream is not allowed to have any data errors and loss under any circumstances, unless the processor speed is not enough. At the same time, the PLL inside the processor cannot generate the I2S clock we need, so the external clock becomes inevitable, and the Slave I2S interface is also essential. In fact, I2S has encountered the most problems in our development process, such as inaccurate synchronization, left and right channel reversal when starting playback, irregular left and right channel reversal during playback, and data output frame loss, which have seriously affected The output technical parameters can not meet the design requirements.

          In the course of our product design in the past few years, the detour we took was caused by the fact that the details of the chip were not well understood. Because the development system of any manufacturer does not directly indicate whether it can support the high-definition music format, the maximum number of sampling rates supported by the music output, nor can it directly assess whether its platform can meet the performance indicators we need, so we must be based on our needs. The I2S output circuit is adjusted. In order to evaluate the system, we have to do a lot of design work (including hardware and software) to start the evaluation work.

          Chip selection needs to measure multiple performance parameters

          In the design process, we have chosen Samsung's chips and domestic chips, but we have to give up because of various problems, and finally decided on the current plan. Samsung a€?s chip has insufficient I2S output digits, limited NAND Flash types supported, and high unit cost of SDRAM. USB host until its ARM11 product ca na€?t keep up with the required speed, so we gave up after the first batch of selections. Later, I chose a domestic platform because I2S FIFO depth was not enough, which caused frame loss. In addition, due to the problem of USB PHY, the compatibility with the flash disk was very poor, and its upgrade platform was not resolved, and the SD card was not compatible because of software problems. Well, the more fatal problem is that the system is unstable, the processor cannot be reset normally, or there is a problem of NAND Flash losing data for no reason after running for a period of time, and finally it cannot be used.

          The product finally wins in the details. After trying various products with flaws, we finally had to abandon the domestic chips and choose the products of foreign A manufacturers. From the hardware system of manufacturer A, the result that can be drawn is that the hardware details are quite good. We tested its chip and found that its consistency is very high, and the system margin is well designed. The nominal 375MHz chip can basically be overclocked to 572MHz under the condition of non-highest core voltage, which is 50% higher than the nominal frequency. At the same time, the DDR2 clock is overclocked by 60%, and the performance is not bad. In terms of register design, many are designed according to the data structure of the Linux system, so as long as you are familiar with the software, you can easily get familiar with the hardware.

          In the part of large-scale data throughput, manufacturer A uses linked DMA. This detail perfectly guarantees the continuity of the output data stream and maximizes the most important I2S data output without frame loss. During the test, we decoded and decompressed the local data through the SD card. There was no frame loss even when the CPU was fully loaded. This shows that the hardware capabilities of manufacturer A are strong.

          Here we analyze why the frames are dropped. In fact, most systems complete the transmission of a data stream. The data stream of audio decoding is to read the original code stream from the SD card and other media, and then send it to the I2S output after the CPU decodes. This process involves important data transmission. Media To RAM, and then from RAM to I2S, these data streams are completed by DMA, and the bottleneck is in the process of DMA switching. The Linux file system is cached by the system, and the requirements for timing are not high. I2S requires continuous data, which is closely related to the I2S FIFO. If the system does not automatically switch buffers, the CPU is required to intervene in the switch, and the CPU The interrupt response time will seriously affect the continuity of data. For example, the FIFO of I2S is 32 data. If the LRCK of I2S is 192kHz, the longest interruption time that can be given to the CPU is 32/2 / 192kHz = 83?μs, and according to the interruption mechanism, the interruption is usually applied when the FIFO is half left. Then the time is less than 50?μs. This speed is basically unable to meet the demand in ordinary Linux systems, so frame loss is inevitable. When designing by IC manufacturers, the indicators are all designed according to 96kHz hardware indicators, which of course cannot meet the requirements of high-end systems. A manufacturer's automatic DMA chain does not require the CPU to switch data, and the software divides 2 or more pieces of data (Ping pong buffer) to allow the DMA to automatically switch, so the continuity of the output data is perfectly guaranteed. As far as the sound system is concerned, as soon as I2S loses frames, it will be detected immediately, and it will not be able to pass the detection of the instrument, so if this detail is not in place, it will not be able to go to the market.

          In addition, the hardware of manufacturer A includes SATA interface and USB 2.0 host / SD card support with impeccable compatibility and speed. What is even better is that a small ARM9 chip also comes with EMAC and two small microcontrollers. The speed of each is half the speed of the system clock. This small single-chip microcomputer can achieve more functions than ordinary MCUs. If you think the CPU speed is not enough, you can also choose a pin-compatible chip with a floating-point DSP. The computing power of this DSP is equivalent to the same ARM9 operating speed of 2G or more, which is a crucial performance improvement for data back-end processing. A manufacturer's film also provides the TF card startup function, so that it can perfectly avoid the problems caused by the development of NAND, and at the same time solve the problem of the startup speed of the file system established by NAND in Linux.

          Here to talk about the clock circuit. Due to the need to support 32K ~ 192K sampling rate, it must be able to generate the corresponding clock, while requiring jitter less than 50ps (processor built-in PLL clock is generally above 200ps). For the DAC, many domestic chips integrate the DAC into the CPU because of the low cost of integration, but this does not improve the performance. For example, THD + N can only reach about 90dB, while THD + N of the world a€?s top DACs Achieve an amazing -120dB, while providing a dynamic range of 135dB. Such high performance has extremely strict requirements on the entire system design, so the price of similar foreign products is not less than 4,000 US dollars. In addition, the final key point of hardware system design is PCB routing.

          In terms of software, the system needs to cover dozens of optimized audio decoders. The decoded output digital signal needs to be post-processed by DSP. In addition, it also involves FPGA Verilog software programming, network UPNP protocol control, file sharing, remote playback / control, etc. This kind of agreement covers a wide range. At present, there are basically no domestic suppliers that can carry out related design and production.

          summary

          The audio system belongs to a typical combination of low-frequency analog signals and high-frequency digital signals. Therefore, the manufacturers that can do well are few in the world and even rare in China. After more than three years of research and development, the system has finally reached the international mid-to-upstream level. The product's listening experience is comparable to that of the international first-line brand Linn Akurate DS. Due to the reasonable and reasonable design of the system, in strict listening environment, the monitor speakers and the market price are 12 Compared with the DAC A / B of a well-known European brand of about RMB 1,000, the listening experience is even better.

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          亚洲 欧美 图片 自拍 视频
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