亚洲 欧美 图片 自拍 视频

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          Embedded Real-Time Face Detection Application Design Guide

          The embedded computer vision system is very similar to the human visual system, analyzing and extracting video information from a wide variety of products to perform the same visual functions as the human visual system.

          In embedded portable products such as smartphones, digital cameras and camcorders, high performance must be provided with limited size, cost and power consumption. The emerging market for high-volume embedded vision products includes automotive security, surveillance and gaming. Computer vision algorithms identify objects in the scene and then produce an image area that is more important than other image areas. For example, object and face detection can be used to enhance video conferencing experiences, public safety archive management, and content-based retrieval and many other aspects.

          Cropping and resizing can be done to properly place the image at the center of the face. In this paper, we present an application for detecting a face in a digital image, cropping the selected main face, and resizing the image to a fixed size output image (see Figure 1). This application can be used on a single image or on a video stream and is designed to run in real time. As long as people pay attention to real-time face detection on mobile products, in order to achieve real-time throughput, appropriate execution steps must be taken.

          This paper presents deployment steps for performing real-time face detection applications on a programmable vector processor that can be used to perform similar computer vision algorithms on any mobile product, in which case they are generic.

          Embedded Real-Time Face Detection Application Design Guide (Electronic Engineering Album)

          Figure 1: CEVA Face Detection Application

          Although still image processing consumes a small amount of bandwidth and allocates memory, video is quite demanding on current memory systems.

          On the other hand, the memory system design of computer vision algorithms is extremely challenging due to the need for more processing steps to detect and distinguish objects. Consider a 19x19 pixel size facial graphic thumbnail. For this small image, there are 256,361 possible combinations of gray values, which require extremely high three-dimensional space. Due to the complexity of facial images, it is difficult to clearly describe facial features; therefore, other methods based on statistical models have been established. These methods treat the face area as a graph, construct a discriminator by aiming at many "face" and "non-face" samples, and then determine whether the image contains a human face by analyzing the graph of the detected area.

          Other challenges that face detection algorithms must overcome are: posture (front, 45 degrees, side, inversion), presence or absence of structural parts (whiskers, glasses), facial expressions, occlusion (some faces may be covered by other objects), image orientation (In the direction of rotation of the camera's optical axis, the surface of the face changes directly) and imaging conditions (illumination, camera characteristics, resolution).

          Although many face detection algorithms have been introduced in the literature, only a small number of algorithms can meet the real-time limitations of mobile products. Although many face detection algorithms are reported to produce high detection rates, few algorithms are suitable for real-time deployment on these mobile products due to computational and memory limitations of mobile products such as mobile phones.

          Typically, real-time execution of face detection algorithms is performed on PCs with relatively powerful CPUs and large memory sizes. An examination of existing face detection products shows that the algorithms introduced by Viola and Jones in 2001 have been widely adopted. This is a groundbreaking work that allows for a real-time approach based on a look-and-feel approach while maintaining the same or higher accuracy.

          This algorithm utilizes an enhanced cascade of simple features and can be divided into three main parts: (1) integral graphs - efficient convolution for fast feature evaluation; (2) use of Adaboost for feature selection, and according to importance They are screened by sex order. Each feature can be used as a simple (weak) discriminator; (3) Adaboost is used to understand the cascade distinguisher (a set of weak discriminators) that filters out areas that are least likely to contain faces. 2 is a schematic diagram of a classifier cascade. In an image, most sub-images are not face instances.

          Based on this assumption, we can use a smaller efficient classifier to exclude many negatives at an early stage, while detecting almost all positive cases. In the later stages, more complex distinguishers were used to review the difficult situation.

          Example: 24 cascade categorizer

          Level 1 feature distinguisher = " Exclude 60% non-face, while detecting 100% face

          Secondary 5 feature distinguisher = " Exclude 80% non-face, while detecting 100% face

          Level 3, Level 4 and Level 5 20 feature distinguishers

          Level 6 and Level 7 50 feature distinguishers

          Level 8 to 12 100 feature distinguishers

          Level 13 to 24 200 feature distinguisher

          Embedded Real-Time Face Detection Application Design Guide (Electronic Engineering Album)

          Figure 2: Cascading of the divider

          At the first level of the face detection algorithm, rectangular features can be quickly calculated using an intermediate representation called an integral image. As shown in FIG. 3, the integral image value of the point (x, y) is the sum of all the pixels of the upper and left portions. The sum of the pixels in D can be calculated as 4+1-(2+3).

          Embedded Real-Time Face Detection Application Design Guide (Electronic Engineering Album)

          Figure 3: Rapid evaluation of rectangular features using integral images

          In order to perform real-time face detection applications on embedded products, advanced parallelism combining instruction level parallelism with data level parallelism is required. The Very Long Instruction Word (VLIW) architecture enables advanced parallel instruction processing, providing extended parallelism and low power consumption.

          The Single Instruction Multiple Data (SIMD) architecture enables single instructions to be run on multiple data elements, reducing code length and performance. Using the vector processor architecture, the calculation of these integral sums can be accelerated by the adder/subtractor parallel quantity factor. If the vector register can load 16 pixels and these pixels can be added to the next vector at the same time, the acceleration factor is 16. Obviously, adding a similar vector processing unit to the processor can double this factor.

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          亚洲 欧美 图片 自拍 视频
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